Intel Unveils Advanced Glass Substrate Technology for Next-Gen AI and HPC Accelerators at NEPCON Japan 2026
At NEPCON Japan 2026, Intel introduced its cutting-edge glass substrate technology, setting a new benchmark for advanced AI and high-performance computing (HPC) accelerators. This innovation, highlighted by SemiVision Taiwan, features a high-performance glass core substrate measuring 78x77 mm, designed to support the increasing demands of next-generation computing.
Key Features of Intel’s Glass Substrate
The new glass substrate can accommodate approximately twice the reticle size compared to traditional silicon, offering around 1,716 mm² (2x858 mm²) of silicon area for logic and memory integration. This expanded area enables higher performance and greater integration density, crucial for AI and HPC workloads.
Intel’s substrate is the first to utilize a 10-2-10-thick glass core, incorporating the company’s EMIB (Embedded Multi-die Interconnect Bridge) multi-chip module technology. The design includes 10 redistribution layer (RDL) build-up layers on the top side, dedicated to fine-pitch signal routing from the die. These layers are essential for managing the complex interconnections required by modern accelerators.
The glass core itself consists of two layers, each made from 800 μm (0.8 mm) class material. These layers may include embedded metal for through-glass-vias (TGVs) or power and ground planes, enhancing both electrical performance and structural integrity. The bottom side mirrors the top with 10 additional build-up layers, ensuring symmetric routing and efficient connectivity to the motherboard or PCB. This approach simplifies the transition from the dense wiring of the silicon die to the more standardized connections required by system boards.
Advanced Packaging and Reliability
Intel’s 10-2-10 glass core substrate stands out with its exceptionally fine bump pitch of just 45 μm (0.045 mm), enabling higher interconnect density and improved signal integrity. The substrate also integrates two EMIB bridges, allowing multiple smaller dies to be interconnected efficiently within a single package. This modular approach supports greater scalability and flexibility in chip design.
A significant challenge in glass substrate manufacturing is the risk of SeWaRe—micro-cracking that can occur during processing due to the brittle nature of glass. Intel reports that its latest manufacturing techniques have effectively mitigated SeWaRe, ensuring robust and reliable substrates even during the dicing process. This advancement reflects Intel’s expertise in material science and process engineering.
Benefits and Industry Impact
Glass substrates offer several advantages over traditional organic packaging, including superior heat resistance, reduced warping, and enhanced electrical isolation. These properties minimize signal delays and interference, which is critical for densely packed, high-speed interconnects in AI and HPC applications. The complexity of glass substrate manufacturing means that only a select few industry leaders are pursuing this technology, positioning Intel at the forefront of advanced semiconductor packaging.
With its new glass substrate technology, Intel is paving the way for more powerful, reliable, and efficient AI and HPC accelerators, addressing the growing demands of data-intensive workloads and setting a new standard for the industry.
